1. Related Background Art
The present invention relates to a semiconductor device, and particularly, to a photoelectric conversion device, an area sensor, and a radiation imaging (or image pickup) apparatus having photoelectric conversion elements arranged in a matrix.
FIG. 11 is an equivalent circuit diagram of a prior art photoelectric conversion device.
In FIG. 11, reference numerals P11 to P44 denote semiconductor elements such as photoelectric conversion elements and reference numerals T11 to T44 denote thin film transistors (TFT). As shown in the figure, the gate electrode of each TFT is generally connected to common gate lines Vg1 to Vg4. Each of the gate lines controls the ON/OFF operations of the TFTs.
The source or drain electrode of each TFT is connected to common signal lines Sig1 to Sig4, which are connected to a readout unit. Electric charge generated in the semiconductor elements such as photoelectric conversion elements due to incident visible light or radiation is transferred to the signal lines with gate drive pulses applied by a gate drive unit and is then read out by the readout unit.
FIG. 12 is a plan view of the photoelectric conversion device shown in FIG. 11. As shown in the figure, an additional wiring is provided above the Vg lines as a redundant wiring for Vg lines (Vg redundant wiring) and is joined to the Vg lines through contact holes.
FIG. 13 is a plan view and a sectional view for showing the layer configuration of one pixel in a semiconductor device. The semiconductor device comprises, on an insulating substrate, a semiconductor element such as a photoelectric conversion element, a radiation detection element, or the like which is comprised of a first electrode layer, an insulating layer, a first semiconductor layer, an n+-type semiconductor layer, and a second electrode layer, and a switching TFT which is comprised of a gate electrode layer, a gate insulating layer, a second semiconductor layer, and an ohmic contact layer. Each Vg line is connected to an electrode layer in which the TFT gate electrode is formed and each Sig line is connected to a layer which forms the source/drain electrode.
However, evolution in manufacturing technology for liquid crystal panels using TFTs and increased applicability of area sensors having photoelectric conversion elements to various fields (for example, an X-ray imaging apparatus) have accelerated the development of TFT panels with a larger area. With the enlargement of the area, the pattern pitch becomes finer and finer.
This trend results in lowering of the yield of the panel manufacturing process. Possible causes would be as described below.
Firstly, panels with a larger area have an increased wiring length per panel, which may increase the breaking probability.
Secondly, a finer pattern brings about enlargement of the TFT area or wire crossing area per panel, which may cause a higher probability of short-circuiting between upper and lower metal wirings due to foreign matters.
Thirdly, a larger panel size requires a larger area where a panel is in contact with apparatuses for transporting and handling the panel, and thus, may generate a larger amount of static electricity with a higher probability of generation of defects due to electrostatic destruction (ESD).
The yield may be improved by solving the above-mentioned technical problems and in particular, the breaking problem may be solved with a larger wiring width.
However, a wider wiring may increase the capacitance of a capacitor formed between the upper and lower metal wirings such as a crossing of a Sig line and a Vg line to decrease the sensitivity of a signal to be transferred.
Additionally, if a redundant wiring is formed for each wiring as a remedy for possible breaking, the aperture ratio of a photoelectric conversion element section may decrease with a further decrease in the sensitivity.
As described above, it is very difficult to appropriately design the wiring width, redundant circuit, and so on.